This course will study the design of complex computer systems. All parts of a computer system as covered. We will start off with a discussion of computer performance and measurement, instruction set architectures and computer arithmetic. We will discuss the basic control unit of a computer and the design of system datapaths. We will discuss pipelining, the most important topic in CPU design today. Finally, we will move to memory hierarchy and cache design and performance, input/output devices and signalling, and buses. We will finish the course with a brief discussion of multiprocessor systems.
| Project | Description |
| 64-bit Multiplier 128-bit Multiplier (VHDL/Cadence) |
These are just real simple 64-bit and 128-bit multipliers written in VHDL and simulated on the Cadence system at UMBC. The 128-bit version does not include a test entity but it would be trivial to create one or copy the test entity from the 64-bit version. |
| MIPS Pipeline in C++ | A basic pipeline implementation contructed to analyze the effects of hazards at various stages. Unfortunately this was a non-working prototype and I can’t seem to find the final version. Ah well… hopefully someone will find it useful. |
| An index of all cs411 files can be found here. | |
